Extending a backend

[Gobaan_Raveendran]

Hello everyone,

As a proof of concept, I am trying to extend the gcc spu backend to produce
a few new assembly instructions, specifically loads and stores of the form

Load rt, s2(s18)
Store s2(s18), rc

However after searching and reading a lot of documentation, I still cannot
figure out all the files that need to be editted in order for gcc to output
an instruction and understand how that instruction works. Currently I have
it detecting the 'store' is an incorrect mnemoic (because I got define_inst
outputting it). I would like to know if there are any recommended tutorials
on how to add a instruction to the assembly language, and if there is an
easier backend port that I should experiment on until I learn how to deal
with all the components of RTL.

Note, this is a proof of concept, so I only need to be able to output the
instructions, not assemble them or even verify that they are the correct
bit size.

Thanks for your help,

Gobi

[Ben Elliston]

> Load rt, s2(s18)
> Store s2(s18), rc
>
> However after searching and reading a lot of documentation, I still cannot
> figure out all the files that need to be editted in order for gcc to output
> an instruction and understand how that instruction works. Currently I have
> it detecting the 'store' is an incorrect mnemoic (because I got define_inst
> outputting it). I would like to know if there are any recommended tutorials
> on how to add a instruction to the assembly language, and if there is an
> easier backend port that I should experiment on until I learn how to deal
> with all the components of RTL.

The machine description is responsible for generating the assembly text
(you'll see plenty of obvious examples of this).  Once the compiler is
emitting the right assembly source (compile with -S and inspect), then
you need to move onto the binutils to make the assembler recognise these
mnemonics.

What are you trying to do, exactly? :-)

Cheers, Ben

[Gobaan_Raveendran]

I basically need to test the retarget ability of named address spaces, and
it was determined that the best way to do this was to attempt to have the
SPU implementation spit out a few assembly mnemonics that resemble what our
architecture uses to handle multiple address spaces(hence the loads and
stores). Then I have to see if I can make it generate errors when mutually
exclusive address spaces are used interchangeably. Changing binutils would
be the next step, however this is more of a proof of concept so my manager
and I can see if gcc can be presented as an alternative compiler for our
core.

> The machine description is responsible for generating the assembly text
> (you'll see plenty of obvious examples of this).  Once the compiler is
> emitting the right assembly source (compile with -S and inspect), then
> you need to move onto the binutils to make the assembler recognise these
> mnemonics.
>

Thanks, I have been using -S and reading examples/documentation on how to
make RTLs. The SPU port is large and it gets a little tedious trying to
experiment with RTL within it.  I am trying to find a smaller template port
to practice changing machine descriptions until I understand the necessary
changes.

Thanks for the help =^D, Gobi.