CCP1 Glitches in noisy environment (RC Tx)

[Gordon Williams]

Hi All,

I'm having problems tracking down the reason of some glitches occurring on
the CCP1 output and it is driving me a bit crazy.

I'm putting some smarts into a basic RC transmitter.  I've replaced the
current chip producing the pulse train to the RF section with a daughter
board and added a cell phone LCD, some switches and Serial port for input
and output.  The serial port and LCD (spi) work fine and they don't have any
glitches.  The 5 ADC readings for the joysticks (4) and battery voltage also
work well with only 1 bit of noise on a 10 bit reading (referenced to the
power and gnd lines).

The PIC that I am using is the 16F886.  Its supply is a 78L05 on the main
board and I have a 10uf Tant and three 0.1uF on the power lines on the
daughter board.  The daughter board is single sided with a ground plane pour
under the PIC and every else where I could.  Because I don't have ADC
problems or serial or spi errors that noise must be reasonably constrained,
I think.

I'm using CCP1 (pin C2) to produce the PPM that goes to the RF section.  It
is the standard PPM protocol (each channel pulse is 1 to 2 ms wide including
the following 0.3 ms pulse, repeated every 20ms).

Timer1 runs freely.  With a CCP1 interrupt (my only interrupt) I update
CCPR1 with the duration until the next transition high or low and the
CCP1CON bits to set the next transition in the correct direction.  My main
program clears a flag and that is all.

Most of the time it works perfectly and looks like:
http://www.cyberus.ca/~g_will/TxGlitch/NoGlitch1.jpg

or detail

http://www.cyberus.ca/~g_will/TxGlitch/NoGlitch.jpg

The receiver pulses for the first 4 channes are shown in the logic section
below.

Every 20 to 100 frames on average (sometimes they are consectutive frames) I
get a glitch:

http://www.cyberus.ca/~g_will/TxGlitch/Glitch1.jpg

or

http://www.cyberus.ca/~g_will/TxGlitch/Glitch2.jpg

The green lines indicate where the signal should have been.

There is a fair bit of noise - about 1.8 volts p-p because the scope ground
was attached to the battery neg lead.  I don't think that my probes are very
well shielded either.  The noise is from the 72 Mhz RF.

In each case the low output flips high.  My question is WHY?

Timer 1 keeps on rolling as there is no problem with frame spacing or the
width or placement of the next good pulse.

CCPR1 is not upset or incorrectly set for the same reasons - because the
next good pulse is in the proper location relative to the last good pulse.

The serial and LCD have been comment out.  I'm reading 2 ADC on port A and
3ADC on port B.  All other pins on ports A,B,C are inputs and some are
floating (could this be a problem?)

Is there anything else on the chip that may be miss-configured that may be
giving me a problem?

The chip docs say:
Note: Clearing the CCP1CON register will force
the CCPx compare output latch to the
default low level. This is not the PORT I/O
data latch.

But I don't think that this applies to me.  The only time that I do anything
with the CCP1CON is during the long bit in the frame between the pulse
series and the glitch doesn't always happen there.

It is not read-mod-write ... I'm not writing anything to the port.

I read the errata - nothing there indicated a problem.

Any ideas what I should be looking at/ trying next??

- I guess I should look at the 5 v power going to the chip to see that it is
truly quiet and doesn't have a spike.  Brown out is disabled.

- Should set the un-used outputs to either high or low.  - Good right?

Funny that it is only affecting one pin that I can see.

Looking for suggestions...

Regards,

Gordon Williams

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[Vasile Surducan-2]

You have a huge noise there, try to see why. Almost 2Vpp of noise is a
real mess.
It's possible that sometime the PWM dutycycle be longer that PWM period?
Only then the CCP output remains high. Maybe a compiler problem ?

Wesley-Basil-Vasile

On 5/12/08, Gordon Williams <g_will@...> wrote:

> Hi All,
>
> I'm having problems tracking down the reason of some glitches occurring on
> the CCP1 output and it is driving me a bit crazy.
>
> I'm putting some smarts into a basic RC transmitter.  I've replaced the
> current chip producing the pulse train to the RF section with a daughter
> board and added a cell phone LCD, some switches and Serial port for input
> and output.  The serial port and LCD (spi) work fine and they don't have any
> glitches.  The 5 ADC readings for the joysticks (4) and battery voltage also
> work well with only 1 bit of noise on a 10 bit reading (referenced to the
> power and gnd lines).
>
> The PIC that I am using is the 16F886.  Its supply is a 78L05 on the main
> board and I have a 10uf Tant and three 0.1uF on the power lines on the
> daughter board.  The daughter board is single sided with a ground plane pour
> under the PIC and every else where I could.  Because I don't have ADC
> problems or serial or spi errors that noise must be reasonably constrained,
> I think.
>
> I'm using CCP1 (pin C2) to produce the PPM that goes to the RF section.  It
> is the standard PPM protocol (each channel pulse is 1 to 2 ms wide including
> the following 0.3 ms pulse, repeated every 20ms).
>
> Timer1 runs freely.  With a CCP1 interrupt (my only interrupt) I update
> CCPR1 with the duration until the next transition high or low and the
> CCP1CON bits to set the next transition in the correct direction.  My main
> program clears a flag and that is all.
>
> Most of the time it works perfectly and looks like:
> http://www.cyberus.ca/~g_will/TxGlitch/NoGlitch1.jpg
>
> or detail
>
> http://www.cyberus.ca/~g_will/TxGlitch/NoGlitch.jpg
>
> The receiver pulses for the first 4 channes are shown in the logic section
> below.
>
> Every 20 to 100 frames on average (sometimes they are consectutive frames) I
> get a glitch:
>
> http://www.cyberus.ca/~g_will/TxGlitch/Glitch1.jpg
>
> or
>
> http://www.cyberus.ca/~g_will/TxGlitch/Glitch2.jpg
>
> The green lines indicate where the signal should have been.
>
> There is a fair bit of noise - about 1.8 volts p-p because the scope ground
> was attached to the battery neg lead.  I don't think that my probes are very
> well shielded either.  The noise is from the 72 Mhz RF.
>
> In each case the low output flips high.  My question is WHY?
>
> Timer 1 keeps on rolling as there is no problem with frame spacing or the
> width or placement of the next good pulse.
>
> CCPR1 is not upset or incorrectly set for the same reasons - because the
> next good pulse is in the proper location relative to the last good pulse.
>
> The serial and LCD have been comment out.  I'm reading 2 ADC on port A and
> 3ADC on port B.  All other pins on ports A,B,C are inputs and some are
> floating (could this be a problem?)
>
> Is there anything else on the chip that may be miss-configured that may be
> giving me a problem?
>
> The chip docs say:
> Note: Clearing the CCP1CON register will force
> the CCPx compare output latch to the
> default low level. This is not the PORT I/O
> data latch.
>
> But I don't think that this applies to me.  The only time that I do anything
> with the CCP1CON is during the long bit in the frame between the pulse
> series and the glitch doesn't always happen there.
>
> It is not read-mod-write ... I'm not writing anything to the port.
>
> I read the errata - nothing there indicated a problem.
>
> Any ideas what I should be looking at/ trying next??
>
> - I guess I should look at the 5 v power going to the chip to see that it is
> truly quiet and doesn't have a spike.  Brown out is disabled.
>
> - Should set the un-used outputs to either high or low.  - Good right?
>
> Funny that it is only affecting one pin that I can see.
>
> Looking for suggestions...
>
> Regards,
>
> Gordon Williams
>
> --
> http://www.piclist.com PIC/SX FAQ & list archive
> View/change your membership options at
> http://mailman.mit.edu/mailman/listinfo/piclist
>

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[Gordon Williams]

: You have a huge noise there, try to see why. Almost 2Vpp of noise is a
: real mess.
: It's possible that sometime the PWM dutycycle be longer that PWM period?
: Only then the CCP output remains high. Maybe a compiler problem ?

I should have been clearer about the part of the CCP module that I was
using.  I'm using the "compare" rather than the "pwm" part.

I don't think that it is a compiler problem as the effect is random and
nothing else appears to be affected.  I can't see it just jumping off
somewhere else in the program and not having an effect on either the Timer 1
or the CCPR1 register.

I need to look more carefully at the noise on the 5 V section of the
daugther board.  It is buried in the transmitter box and a PIA to get at.
Because the ADCs are noise free, my assumption was that it was fairly noise
free.

How much noise on the power lines is acceptable?

If the noisy supply voltage stays between 2.0 and 5.5 volts, is that OK? Or
does the noise component need to be kept below some value p-p?

Regards,

Gordon Williams


: On 5/12/08, Gordon Williams <g_will@...> wrote:
: > Hi All,
: >
: > I'm having problems tracking down the reason of some glitches occurring
on
: > the CCP1 output and it is driving me a bit crazy.
: >
: > I'm putting some smarts into a basic RC transmitter.  I've replaced the
: > current chip producing the pulse train to the RF section with a daughter
: > board and added a cell phone LCD, some switches and Serial port for
input
: > and output.  The serial port and LCD (spi) work fine and they don't have
any
: > glitches.  The 5 ADC readings for the joysticks (4) and battery voltage
also
: > work well with only 1 bit of noise on a 10 bit reading (referenced to
the
: > power and gnd lines).
: >
: > The PIC that I am using is the 16F886.  Its supply is a 78L05 on the
main
: > board and I have a 10uf Tant and three 0.1uF on the power lines on the
: > daughter board.  The daughter board is single sided with a ground plane
pour
: > under the PIC and every else where I could.  Because I don't have ADC
: > problems or serial or spi errors that noise must be reasonably
constrained,
: > I think.
: >
: > I'm using CCP1 (pin C2) to produce the PPM that goes to the RF section.
It
: > is the standard PPM protocol (each channel pulse is 1 to 2 ms wide
including
: > the following 0.3 ms pulse, repeated every 20ms).
: >
: > Timer1 runs freely.  With a CCP1 interrupt (my only interrupt) I update
: > CCPR1 with the duration until the next transition high or low and the
: > CCP1CON bits to set the next transition in the correct direction.  My
main
: > program clears a flag and that is all.
: >
: > Most of the time it works perfectly and looks like:
: > http://www.cyberus.ca/~g_will/TxGlitch/NoGlitch1.jpg
: >
: > or detail
: >
: > http://www.cyberus.ca/~g_will/TxGlitch/NoGlitch.jpg
: >
: > The receiver pulses for the first 4 channes are shown in the logic
section
: > below.
: >
: > Every 20 to 100 frames on average (sometimes they are consectutive
frames) I
: > get a glitch:
: >
: > http://www.cyberus.ca/~g_will/TxGlitch/Glitch1.jpg
: >
: > or
: >
: > http://www.cyberus.ca/~g_will/TxGlitch/Glitch2.jpg
: >
: > The green lines indicate where the signal should have been.
: >
: > There is a fair bit of noise - about 1.8 volts p-p because the scope
ground
: > was attached to the battery neg lead.  I don't think that my probes are
very
: > well shielded either.  The noise is from the 72 Mhz RF.
: >
: > In each case the low output flips high.  My question is WHY?
: >
: > Timer 1 keeps on rolling as there is no problem with frame spacing or
the
: > width or placement of the next good pulse.
: >
: > CCPR1 is not upset or incorrectly set for the same reasons - because the
: > next good pulse is in the proper location relative to the last good
pulse.
: >
: > The serial and LCD have been comment out.  I'm reading 2 ADC on port A
and
: > 3ADC on port B.  All other pins on ports A,B,C are inputs and some are
: > floating (could this be a problem?)
: >
: > Is there anything else on the chip that may be miss-configured that may
be
: > giving me a problem?
: >
: > The chip docs say:
: > Note: Clearing the CCP1CON register will force
: > the CCPx compare output latch to the
: > default low level. This is not the PORT I/O
: > data latch.
: >
: > But I don't think that this applies to me.  The only time that I do
anything
: > with the CCP1CON is during the long bit in the frame between the pulse
: > series and the glitch doesn't always happen there.
: >
: > It is not read-mod-write ... I'm not writing anything to the port.
: >
: > I read the errata - nothing there indicated a problem.
: >
: > Any ideas what I should be looking at/ trying next??
: >
: > - I guess I should look at the 5 v power going to the chip to see that
it is
: > truly quiet and doesn't have a spike.  Brown out is disabled.
: >
: > - Should set the un-used outputs to either high or low.  - Good right?
: >
: > Funny that it is only affecting one pin that I can see.
: >
: > Looking for suggestions...
: >
: > Regards,
: >
: > Gordon Williams
: >
: > --
: > http://www.piclist.com PIC/SX FAQ & list archive
: > View/change your membership options at
: > http://mailman.mit.edu/mailman/listinfo/piclist
: >
: --
: http://www.piclist.com PIC/SX FAQ & list archive
: View/change your membership options at
: http://mailman.mit.edu/mailman/listinfo/piclist
:

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[Richard Prosser]

Gordon,
You're not just running out of stack or something like that are you?
Have you checked stack usage?

Otherwise, could the RF be getting back into the chip via an
unprotected pin. Do you have ferrite beads / caps on all input (&
possibly output ?) pins if the RF level is so high? Once the
protection diodes start conducting all sorts of strange things can
happen.

RP

2008/5/13 Gordon Williams <g_will@...>:

>
>
> : You have a huge noise there, try to see why. Almost 2Vpp of noise is a
> : real mess.
> : It's possible that sometime the PWM dutycycle be longer that PWM period?
> : Only then the CCP output remains high. Maybe a compiler problem ?
>
> I should have been clearer about the part of the CCP module that I was
> using.  I'm using the "compare" rather than the "pwm" part.
>
> I don't think that it is a compiler problem as the effect is random and
> nothing else appears to be affected.  I can't see it just jumping off
> somewhere else in the program and not having an effect on either the Timer 1
> or the CCPR1 register.
>
> I need to look more carefully at the noise on the 5 V section of the
> daugther board.  It is buried in the transmitter box and a PIA to get at.
> Because the ADCs are noise free, my assumption was that it was fairly noise
> free.
>
> How much noise on the power lines is acceptable?
>
> If the noisy supply voltage stays between 2.0 and 5.5 volts, is that OK? Or
> does the noise component need to be kept below some value p-p?
>
> Regards,
>
> Gordon Williams
>
>
> : On 5/12/08, Gordon Williams <g_will@...> wrote:
> : > Hi All,
> : >
> : > I'm having problems tracking down the reason of some glitches occurring
> on
> : > the CCP1 output and it is driving me a bit crazy.
> : >
> : > I'm putting some smarts into a basic RC transmitter.  I've replaced the
> : > current chip producing the pulse train to the RF section with a daughter
> : > board and added a cell phone LCD, some switches and Serial port for
> input
> : > and output.  The serial port and LCD (spi) work fine and they don't have
> any
> : > glitches.  The 5 ADC readings for the joysticks (4) and battery voltage
> also
> : > work well with only 1 bit of noise on a 10 bit reading (referenced to
> the
> : > power and gnd lines).
> : >
> : > The PIC that I am using is the 16F886.  Its supply is a 78L05 on the
> main
> : > board and I have a 10uf Tant and three 0.1uF on the power lines on the
> : > daughter board.  The daughter board is single sided with a ground plane
> pour
> : > under the PIC and every else where I could.  Because I don't have ADC
> : > problems or serial or spi errors that noise must be reasonably
> constrained,
> : > I think.
> : >
> : > I'm using CCP1 (pin C2) to produce the PPM that goes to the RF section.
> It
> : > is the standard PPM protocol (each channel pulse is 1 to 2 ms wide
> including
> : > the following 0.3 ms pulse, repeated every 20ms).
> : >
> : > Timer1 runs freely.  With a CCP1 interrupt (my only interrupt) I update
> : > CCPR1 with the duration until the next transition high or low and the
> : > CCP1CON bits to set the next transition in the correct direction.  My
> main
> : > program clears a flag and that is all.
> : >
> : > Most of the time it works perfectly and looks like:
> : > http://www.cyberus.ca/~g_will/TxGlitch/NoGlitch1.jpg
> : >
> : > or detail
> : >
> : > http://www.cyberus.ca/~g_will/TxGlitch/NoGlitch.jpg
> : >
> : > The receiver pulses for the first 4 channes are shown in the logic
> section
> : > below.
> : >
> : > Every 20 to 100 frames on average (sometimes they are consectutive
> frames) I
> : > get a glitch:
> : >
> : > http://www.cyberus.ca/~g_will/TxGlitch/Glitch1.jpg
> : >
> : > or
> : >
> : > http://www.cyberus.ca/~g_will/TxGlitch/Glitch2.jpg
> : >
> : > The green lines indicate where the signal should have been.
> : >
> : > There is a fair bit of noise - about 1.8 volts p-p because the scope
> ground
> : > was attached to the battery neg lead.  I don't think that my probes are
> very
> : > well shielded either.  The noise is from the 72 Mhz RF.
> : >
> : > In each case the low output flips high.  My question is WHY?
> : >
> : > Timer 1 keeps on rolling as there is no problem with frame spacing or
> the
> : > width or placement of the next good pulse.
> : >
> : > CCPR1 is not upset or incorrectly set for the same reasons - because the
> : > next good pulse is in the proper location relative to the last good
> pulse.
> : >
> : > The serial and LCD have been comment out.  I'm reading 2 ADC on port A
> and
> : > 3ADC on port B.  All other pins on ports A,B,C are inputs and some are
> : > floating (could this be a problem?)
> : >
> : > Is there anything else on the chip that may be miss-configured that may
> be
> : > giving me a problem?
> : >
> : > The chip docs say:
> : > Note: Clearing the CCP1CON register will force
> : > the CCPx compare output latch to the
> : > default low level. This is not the PORT I/O
> : > data latch.
> : >
> : > But I don't think that this applies to me.  The only time that I do
> anything
> : > with the CCP1CON is during the long bit in the frame between the pulse
> : > series and the glitch doesn't always happen there.
> : >
> : > It is not read-mod-write ... I'm not writing anything to the port.
> : >
> : > I read the errata - nothing there indicated a problem.
> : >
> : > Any ideas what I should be looking at/ trying next??
> : >
> : > - I guess I should look at the 5 v power going to the chip to see that
> it is
> : > truly quiet and doesn't have a spike.  Brown out is disabled.
> : >
> : > - Should set the un-used outputs to either high or low.  - Good right?
> : >
> : > Funny that it is only affecting one pin that I can see.
> : >
> : > Looking for suggestions...
> : >
> : > Regards,
> : >
> : > Gordon Williams
> : >
> : > --
> : > http://www.piclist.com PIC/SX FAQ & list archive
> : > View/change your membership options at
> : > http://mailman.mit.edu/mailman/listinfo/piclist
> : >
> : --
> : http://www.piclist.com PIC/SX FAQ & list archive
> : View/change your membership options at
> : http://mailman.mit.edu/mailman/listinfo/piclist
> :
>
> --
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> View/change your membership options at
> http://mailman.mit.edu/mailman/listinfo/piclist
>

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[David VanHorn-2]

> Otherwise, could the RF be getting back into the chip via an
> unprotected pin. Do you have ferrite beads / caps on all input (&
> possibly output ?) pins if the RF level is so high? Once the
> protection diodes start conducting all sorts of strange things can
> happen.

If the field is strong enough, diodes will start to rectify the RF and
can give you spurious inputs like RESET.
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[Gordon Williams]

Richard and David,

The stack is OK.

The noise appears to be coming in on the 5v supply and/or ground line(s)
from the main board.  There is no separate ground for the analog, digital
and RF sections.  They are all lumped together.  The RF runs directly off of
the battery voltage, 9.6 volts nom.  At the battery with the scope I have
about 2 volts p-p of noise.

I put a 1 ohm resistor in the supply line expecting that it would make an RC
filter with the caps on the daughter board because the noise is 72 Mhz.  It
improved things slightly - maybe.

After doing a bit of research, it looks like the 10uF Tant won't do much for
noise at this frequency because of the ESR.  The three 0.1uF ceramics should
do OK.

I have some ferrite beads on hand that I would like to try out.  They are
axial single beads BL01RN1
http://www.electrokit.se/download/0900766b80098a6d.pdf

Putting one on the tip of the scope probe and then measuring the noise
across the battery terminals dropped the noise by 1/2.

Should I be putting a ferrite bead on both the supply and ground line to the
daughter board?

Would it be a good idea to add a 1uf ceramic as well?

Thanks for your ideas - this is well beyond me.

Regards,

Gordon Williams


----- Original Message -----
From: "Richard Prosser" <rhprosser@...>
To: "Microcontroller discussion list - Public." <piclist@...>
Sent: Monday, May 12, 2008 3:50 PM
Subject: Re: [PIC] CCP1 Glitches in noisy environment (RC Tx)


: Gordon,
: You're not just running out of stack or something like that are you?
: Have you checked stack usage?
:
: Otherwise, could the RF be getting back into the chip via an
: unprotected pin. Do you have ferrite beads / caps on all input (&
: possibly output ?) pins if the RF level is so high? Once the
: protection diodes start conducting all sorts of strange things can
: happen.
:
: RP
:
: 2008/5/13 Gordon Williams <g_will@...>:
: >
: >
: > : You have a huge noise there, try to see why. Almost 2Vpp of noise is a

: > : real mess.
: > : It's possible that sometime the PWM dutycycle be longer that PWM
period?
: > : Only then the CCP output remains high. Maybe a compiler problem ?
: >
: > I should have been clearer about the part of the CCP module that I was
: > using.  I'm using the "compare" rather than the "pwm" part.
: >
: > I don't think that it is a compiler problem as the effect is random and
: > nothing else appears to be affected.  I can't see it just jumping off
: > somewhere else in the program and not having an effect on either the
Timer 1
: > or the CCPR1 register.
: >
: > I need to look more carefully at the noise on the 5 V section of the
: > daugther board.  It is buried in the transmitter box and a PIA to get
at.
: > Because the ADCs are noise free, my assumption was that it was fairly
noise
: > free.
: >
: > How much noise on the power lines is acceptable?
: >
: > If the noisy supply voltage stays between 2.0 and 5.5 volts, is that OK?
Or
: > does the noise component need to be kept below some value p-p?
: >
: > Regards,
: >
: > Gordon Williams
: >
: >
: > : On 5/12/08, Gordon Williams <g_will@...> wrote:
: > : > Hi All,
: > : >
: > : > I'm having problems tracking down the reason of some glitches
occurring
: > on
: > : > the CCP1 output and it is driving me a bit crazy.
: > : >
: > : > I'm putting some smarts into a basic RC transmitter.  I've replaced
the
: > : > current chip producing the pulse train to the RF section with a
daughter
: > : > board and added a cell phone LCD, some switches and Serial port for
: > input
: > : > and output.  The serial port and LCD (spi) work fine and they don't
have
: > any
: > : > glitches.  The 5 ADC readings for the joysticks (4) and battery
voltage
: > also
: > : > work well with only 1 bit of noise on a 10 bit reading (referenced
to
: > the
: > : > power and gnd lines).
: > : >
: > : > The PIC that I am using is the 16F886.  Its supply is a 78L05 on the
: > main
: > : > board and I have a 10uf Tant and three 0.1uF on the power lines on
the
: > : > daughter board.  The daughter board is single sided with a ground
plane
: > pour
: > : > under the PIC and every else where I could.  Because I don't have
ADC
: > : > problems or serial or spi errors that noise must be reasonably
: > constrained,
: > : > I think.
: > : >
: > : > I'm using CCP1 (pin C2) to produce the PPM that goes to the RF
section.
: > It
: > : > is the standard PPM protocol (each channel pulse is 1 to 2 ms wide
: > including
: > : > the following 0.3 ms pulse, repeated every 20ms).
: > : >
: > : > Timer1 runs freely.  With a CCP1 interrupt (my only interrupt) I
update
: > : > CCPR1 with the duration until the next transition high or low and
the
: > : > CCP1CON bits to set the next transition in the correct direction.
My
: > main
: > : > program clears a flag and that is all.
: > : >
: > : > Most of the time it works perfectly and looks like:
: > : > http://www.cyberus.ca/~g_will/TxGlitch/NoGlitch1.jpg
: > : >
: > : > or detail
: > : >
: > : > http://www.cyberus.ca/~g_will/TxGlitch/NoGlitch.jpg
: > : >
: > : > The receiver pulses for the first 4 channes are shown in the logic
: > section
: > : > below.
: > : >
: > : > Every 20 to 100 frames on average (sometimes they are consectutive
: > frames) I
: > : > get a glitch:
: > : >
: > : > http://www.cyberus.ca/~g_will/TxGlitch/Glitch1.jpg
: > : >
: > : > or
: > : >
: > : > http://www.cyberus.ca/~g_will/TxGlitch/Glitch2.jpg
: > : >
: > : > The green lines indicate where the signal should have been.
: > : >
: > : > There is a fair bit of noise - about 1.8 volts p-p because the scope
: > ground
: > : > was attached to the battery neg lead.  I don't think that my probes
are
: > very
: > : > well shielded either.  The noise is from the 72 Mhz RF.
: > : >
: > : > In each case the low output flips high.  My question is WHY?
: > : >
: > : > Timer 1 keeps on rolling as there is no problem with frame spacing
or
: > the
: > : > width or placement of the next good pulse.
: > : >
: > : > CCPR1 is not upset or incorrectly set for the same reasons - because
the
: > : > next good pulse is in the proper location relative to the last good
: > pulse.
: > : >
: > : > The serial and LCD have been comment out.  I'm reading 2 ADC on port
A
: > and
: > : > 3ADC on port B.  All other pins on ports A,B,C are inputs and some
are
: > : > floating (could this be a problem?)
: > : >
: > : > Is there anything else on the chip that may be miss-configured that
may
: > be
: > : > giving me a problem?
: > : >
: > : > The chip docs say:
: > : > Note: Clearing the CCP1CON register will force
: > : > the CCPx compare output latch to the
: > : > default low level. This is not the PORT I/O
: > : > data latch.
: > : >
: > : > But I don't think that this applies to me.  The only time that I do
: > anything
: > : > with the CCP1CON is during the long bit in the frame between the
pulse
: > : > series and the glitch doesn't always happen there.
: > : >
: > : > It is not read-mod-write ... I'm not writing anything to the port.
: > : >
: > : > I read the errata - nothing there indicated a problem.
: > : >
: > : > Any ideas what I should be looking at/ trying next??
: > : >
: > : > - I guess I should look at the 5 v power going to the chip to see
that
: > it is
: > : > truly quiet and doesn't have a spike.  Brown out is disabled.
: > : >
: > : > - Should set the un-used outputs to either high or low.  - Good
right?
: > : >
: > : > Funny that it is only affecting one pin that I can see.
: > : >
: > : > Looking for suggestions...
: > : >
: > : > Regards,
: > : >
: > : > Gordon Williams
: > : >
: > : > --
: > : > http://www.piclist.com PIC/SX FAQ & list archive
: > : > View/change your membership options at
: > : > http://mailman.mit.edu/mailman/listinfo/piclist
: > : >
: > : --
: > : http://www.piclist.com PIC/SX FAQ & list archive
: > : View/change your membership options at
: > : http://mailman.mit.edu/mailman/listinfo/piclist
: > :
: >
: > --
: > http://www.piclist.com PIC/SX FAQ & list archive
: > View/change your membership options at
: > http://mailman.mit.edu/mailman/listinfo/piclist
: >
: --
: http://www.piclist.com PIC/SX FAQ & list archive
: View/change your membership options at
: http://mailman.mit.edu/mailman/listinfo/piclist
:

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[Vasile Surducan-2]

On 5/12/08, Gordon Williams <g_will@...> wrote:

> Richard and David,
>
> The stack is OK.
>
> The noise appears to be coming in on the 5v supply and/or ground line(s)
> from the main board.  There is no separate ground for the analog, digital
> and RF sections.  They are all lumped together.  The RF runs directly off of
> the battery voltage, 9.6 volts nom.  At the battery with the scope I have
> about 2 volts p-p of noise.
>
> I put a 1 ohm resistor in the supply line expecting that it would make an RC
> filter with the caps on the daughter board because the noise is 72 Mhz.  It
> improved things slightly - maybe.
>
> After doing a bit of research, it looks like the 10uF Tant won't do much for
> noise at this frequency because of the ESR.  The three 0.1uF ceramics should
> do OK.
>
> I have some ferrite beads on hand that I would like to try out.  They are
> axial single beads BL01RN1
> http://www.electrokit.se/download/0900766b80098a6d.pdf
>
> Putting one on the tip of the scope probe and then measuring the noise
> across the battery terminals dropped the noise by 1/2.

What scope do you have and how are your probes (1:1, 1:10?)
0.9Vpp noise directly on battery terminals is very weird.
I think you have a ground problem there or measuring problems or toy
scope or all of them. When you are measuring noise, you must move your
ground probe terminal near the probe active ground terminal as well.
A 72Mhz RF module can't give you such a noise only if its homebrewed
and incorrect shielded. Suply the RF through an 300ohm at 100Mhz
ferrite bead and all SPI or I2C signals through 60-100ohm/100MHz
ferrite beads. I presume RF transmitter is proffesional and well
designed, else this is a medicine for a wooden leg.

Anyway, my impression is not the noise the problem which is causing
PWM's glitches...
I've seen it on my projects too where it was less than 100mV noise,
but it wasn't in compare mode.

Wesley

>
> Should I be putting a ferrite bead on both the supply and ground line to the
> daughter board?
>
> Would it be a good idea to add a 1uf ceramic as well?
>
> Thanks for your ideas - this is well beyond me.
>
> Regards,
>
> Gordon Williams
>
>
> ----- Original Message -----
> From: "Richard Prosser" <rhprosser@...>
> To: "Microcontroller discussion list - Public." <piclist@...>
> Sent: Monday, May 12, 2008 3:50 PM
> Subject: Re: [PIC] CCP1 Glitches in noisy environment (RC Tx)
>
>
> : Gordon,
> : You're not just running out of stack or something like that are you?
> : Have you checked stack usage?
> :
> : Otherwise, could the RF be getting back into the chip via an
> : unprotected pin. Do you have ferrite beads / caps on all input (&
> : possibly output ?) pins if the RF level is so high? Once the
> : protection diodes start conducting all sorts of strange things can
> : happen.
> :
> : RP
> :
> : 2008/5/13 Gordon Williams <g_will@...>:
> : >
> : >
> : > : You have a huge noise there, try to see why. Almost 2Vpp of noise is a
>
> : > : real mess.
> : > : It's possible that sometime the PWM dutycycle be longer that PWM
> period?
> : > : Only then the CCP output remains high. Maybe a compiler problem ?
> : >
> : > I should have been clearer about the part of the CCP module that I was
> : > using.  I'm using the "compare" rather than the "pwm" part.
> : >
> : > I don't think that it is a compiler problem as the effect is random and
> : > nothing else appears to be affected.  I can't see it just jumping off
> : > somewhere else in the program and not having an effect on either the
> Timer 1
> : > or the CCPR1 register.
> : >
> : > I need to look more carefully at the noise on the 5 V section of the
> : > daugther board.  It is buried in the transmitter box and a PIA to get
> at.
> : > Because the ADCs are noise free, my assumption was that it was fairly
> noise
> : > free.
> : >
> : > How much noise on the power lines is acceptable?
> : >
> : > If the noisy supply voltage stays between 2.0 and 5.5 volts, is that OK?
> Or
> : > does the noise component need to be kept below some value p-p?
> : >
> : > Regards,
> : >
> : > Gordon Williams
> : >
> : >
> : > : On 5/12/08, Gordon Williams <g_will@...> wrote:
> : > : > Hi All,
> : > : >
> : > : > I'm having problems tracking down the reason of some glitches
> occurring
> : > on
> : > : > the CCP1 output and it is driving me a bit crazy.
> : > : >
> : > : > I'm putting some smarts into a basic RC transmitter.  I've replaced
> the
> : > : > current chip producing the pulse train to the RF section with a
> daughter
> : > : > board and added a cell phone LCD, some switches and Serial port for
> : > input
> : > : > and output.  The serial port and LCD (spi) work fine and they don't
> have
> : > any
> : > : > glitches.  The 5 ADC readings for the joysticks (4) and battery
> voltage
> : > also
> : > : > work well with only 1 bit of noise on a 10 bit reading (referenced
> to
> : > the
> : > : > power and gnd lines).
> : > : >
> : > : > The PIC that I am using is the 16F886.  Its supply is a 78L05 on the
> : > main
> : > : > board and I have a 10uf Tant and three 0.1uF on the power lines on
> the
> : > : > daughter board.  The daughter board is single sided with a ground
> plane
> : > pour
> : > : > under the PIC and every else where I could.  Because I don't have
> ADC
> : > : > problems or serial or spi errors that noise must be reasonably
> : > constrained,
> : > : > I think.
> : > : >
> : > : > I'm using CCP1 (pin C2) to produce the PPM that goes to the RF
> section.
> : > It
> : > : > is the standard PPM protocol (each channel pulse is 1 to 2 ms wide
> : > including
> : > : > the following 0.3 ms pulse, repeated every 20ms).
> : > : >
> : > : > Timer1 runs freely.  With a CCP1 interrupt (my only interrupt) I
> update
> : > : > CCPR1 with the duration until the next transition high or low and
> the
> : > : > CCP1CON bits to set the next transition in the correct direction.
> My
> : > main
> : > : > program clears a flag and that is all.
> : > : >
> : > : > Most of the time it works perfectly and looks like:
> : > : > http://www.cyberus.ca/~g_will/TxGlitch/NoGlitch1.jpg
> : > : >
> : > : > or detail
> : > : >
> : > : > http://www.cyberus.ca/~g_will/TxGlitch/NoGlitch.jpg
> : > : >
> : > : > The receiver pulses for the first 4 channes are shown in the logic
> : > section
> : > : > below.
> : > : >
> : > : > Every 20 to 100 frames on average (sometimes they are consectutive
> : > frames) I
> : > : > get a glitch:
> : > : >
> : > : > http://www.cyberus.ca/~g_will/TxGlitch/Glitch1.jpg
> : > : >
> : > : > or
> : > : >
> : > : > http://www.cyberus.ca/~g_will/TxGlitch/Glitch2.jpg
> : > : >
> : > : > The green lines indicate where the signal should have been.
> : > : >
> : > : > There is a fair bit of noise - about 1.8 volts p-p because the scope
> : > ground
> : > : > was attached to the battery neg lead.  I don't think that my probes
> are
> : > very
> : > : > well shielded either.  The noise is from the 72 Mhz RF.
> : > : >
> : > : > In each case the low output flips high.  My question is WHY?
> : > : >
> : > : > Timer 1 keeps on rolling as there is no problem with frame spacing
> or
> : > the
> : > : > width or placement of the next good pulse.
> : > : >
> : > : > CCPR1 is not upset or incorrectly set for the same reasons - because
> the
> : > : > next good pulse is in the proper location relative to the last good
> : > pulse.
> : > : >
> : > : > The serial and LCD have been comment out.  I'm reading 2 ADC on port
> A
> : > and
> : > : > 3ADC on port B.  All other pins on ports A,B,C are inputs and some
> are
> : > : > floating (could this be a problem?)
> : > : >
> : > : > Is there anything else on the chip that may be miss-configured that
> may
> : > be
> : > : > giving me a problem?
> : > : >
> : > : > The chip docs say:
> : > : > Note: Clearing the CCP1CON register will force
> : > : > the CCPx compare output latch to the
> : > : > default low level. This is not the PORT I/O
> : > : > data latch.
> : > : >
> : > : > But I don't think that this applies to me.  The only time that I do
> : > anything
> : > : > with the CCP1CON is during the long bit in the frame between the
> pulse
> : > : > series and the glitch doesn't always happen there.
> : > : >
> : > : > It is not read-mod-write ... I'm not writing anything to the port.
> : > : >
> : > : > I read the errata - nothing there indicated a problem.
> : > : >
> : > : > Any ideas what I should be looking at/ trying next??
> : > : >
> : > : > - I guess I should look at the 5 v power going to the chip to see
> that
> : > it is
> : > : > truly quiet and doesn't have a spike.  Brown out is disabled.
> : > : >
> : > : > - Should set the un-used outputs to either high or low.  - Good
> right?
> : > : >
> : > : > Funny that it is only affecting one pin that I can see.
> : > : >
> : > : > Looking for suggestions...
> : > : >
> : > : > Regards,
> : > : >
> : > : > Gordon Williams
> : > : >
> : > : > --
> : > : > http://www.piclist.com PIC/SX FAQ & list archive
> : > : > View/change your membership options at
> : > : > http://mailman.mit.edu/mailman/listinfo/piclist
> : > : >
> : > : --
> : > : http://www.piclist.com PIC/SX FAQ & list archive
> : > : View/change your membership options at
> : > : http://mailman.mit.edu/mailman/listinfo/piclist
> : > :
> : >
> : > --
> : > http://www.piclist.com PIC/SX FAQ & list archive
> : > View/change your membership options at
> : > http://mailman.mit.edu/mailman/listinfo/piclist
> : >
> : --
> : http://www.piclist.com PIC/SX FAQ & list archive
> : View/change your membership options at
> : http://mailman.mit.edu/mailman/listinfo/piclist
> :
>
> --
> http://www.piclist.com PIC/SX FAQ & list archive
> View/change your membership options at
> http://mailman.mit.edu/mailman/listinfo/piclist
>

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[Richard-177]

Usually increasing the power supply impedance (one ohm resistor) will worsen
the noise problem.  Low ESR  caps on the supply may help.  I have not been
following this so I do not know if the board has a ground and power plane.
But if you can put a 1 ohm resistor in series with the power line, then you
can put an insulated wire with a ferrite bead.  If it is an RF problem you
need to shunt it out with a series LC that is resonant to the RF frequency.
The series LC network is a low impedance at resonance, and therefore will
attenuate the RF considerably.  The formula for LC resonance is commonly
available.  The resistive element in the LC network should result in a lower
Q and thus a broader resonance band.  Also, if the circuit is powered by a
battery, a post battery regulator circuit is a good idea for RF noise
control.  If you try using a low impedance regulated supply in place of the
battery as a test to see if the problem is attenuated, then you may evaluate
the post battery regulated idea.
Cheers

----- Original Message -----
From: "Gordon Williams" <g_will@...>
To: "Microcontroller discussion list - Public." <piclist@...>
Sent: Tuesday, May 13, 2008 12:07 AM
Subject: Re: [PIC] CCP1 Glitches in noisy environment (RC Tx)

> Richard and David,
>
> The stack is OK.
>
> The noise appears to be coming in on the 5v supply and/or ground line(s)
> from the main board.  There is no separate ground for the analog, digital
> and RF sections.  They are all lumped together.  The RF runs directly off
> of
> the battery voltage, 9.6 volts nom.  At the battery with the scope I have
> about 2 volts p-p of noise.
>
> I put a 1 ohm resistor in the supply line expecting that it would make an
> RC
> filter with the caps on the daughter board because the noise is 72 Mhz.
> It
> improved things slightly - maybe.
>
> After doing a bit of research, it looks like the 10uF Tant won't do much
> for
> noise at this frequency because of the ESR.  The three 0.1uF ceramics
> should
> do OK.
>
> I have some ferrite beads on hand that I would like to try out.  They are
> axial single beads BL01RN1
> http://www.electrokit.se/download/0900766b80098a6d.pdf
>
> Putting one on the tip of the scope probe and then measuring the noise
> across the battery terminals dropped the noise by 1/2.
>
> Should I be putting a ferrite bead on both the supply and ground line to
> the
> daughter board?
>
> Would it be a good idea to add a 1uf ceramic as well?
>
> Thanks for your ideas - this is well beyond me.
>
> Regards,
>
> Gordon Williams
>
>
> ----- Original Message -----
> From: "Richard Prosser" <rhprosser@...>
> To: "Microcontroller discussion list - Public." <piclist@...>
> Sent: Monday, May 12, 2008 3:50 PM
> Subject: Re: [PIC] CCP1 Glitches in noisy environment (RC Tx)
>
>
> : Gordon,
> : You're not just running out of stack or something like that are you?
> : Have you checked stack usage?
> :
> : Otherwise, could the RF be getting back into the chip via an
> : unprotected pin. Do you have ferrite beads / caps on all input (&
> : possibly output ?) pins if the RF level is so high? Once the
> : protection diodes start conducting all sorts of strange things can
> : happen.
> :
> : RP
> :
> : 2008/5/13 Gordon Williams <g_will@...>:
> : >
> : >
> : > : You have a huge noise there, try to see why. Almost 2Vpp of noise is
> a
>
> : > : real mess.
> : > : It's possible that sometime the PWM dutycycle be longer that PWM
> period?
> : > : Only then the CCP output remains high. Maybe a compiler problem ?
> : >
> : > I should have been clearer about the part of the CCP module that I was
> : > using.  I'm using the "compare" rather than the "pwm" part.
> : >
> : > I don't think that it is a compiler problem as the effect is random
> and
> : > nothing else appears to be affected.  I can't see it just jumping off
> : > somewhere else in the program and not having an effect on either the
> Timer 1
> : > or the CCPR1 register.
> : >
> : > I need to look more carefully at the noise on the 5 V section of the
> : > daugther board.  It is buried in the transmitter box and a PIA to get
> at.
> : > Because the ADCs are noise free, my assumption was that it was fairly
> noise
> : > free.
> : >
> : > How much noise on the power lines is acceptable?
> : >
> : > If the noisy supply voltage stays between 2.0 and 5.5 volts, is that
> OK?
> Or
> : > does the noise component need to be kept below some value p-p?
> : >
> : > Regards,
> : >
> : > Gordon Williams
> : >
> : >
> : > : On 5/12/08, Gordon Williams <g_will@...> wrote:
> : > : > Hi All,
> : > : >
> : > : > I'm having problems tracking down the reason of some glitches
> occurring
> : > on
> : > : > the CCP1 output and it is driving me a bit crazy.
> : > : >
> : > : > I'm putting some smarts into a basic RC transmitter.  I've
> replaced
> the
> : > : > current chip producing the pulse train to the RF section with a
> daughter
> : > : > board and added a cell phone LCD, some switches and Serial port
> for
> : > input
> : > : > and output.  The serial port and LCD (spi) work fine and they
> don't
> have
> : > any
> : > : > glitches.  The 5 ADC readings for the joysticks (4) and battery
> voltage
> : > also
> : > : > work well with only 1 bit of noise on a 10 bit reading (referenced
> to
> : > the
> : > : > power and gnd lines).
> : > : >
> : > : > The PIC that I am using is the 16F886.  Its supply is a 78L05 on
> the
> : > main
> : > : > board and I have a 10uf Tant and three 0.1uF on the power lines on
> the
> : > : > daughter board.  The daughter board is single sided with a ground
> plane
> : > pour
> : > : > under the PIC and every else where I could.  Because I don't have
> ADC
> : > : > problems or serial or spi errors that noise must be reasonably
> : > constrained,
> : > : > I think.
> : > : >
> : > : > I'm using CCP1 (pin C2) to produce the PPM that goes to the RF
> section.
> : > It
> : > : > is the standard PPM protocol (each channel pulse is 1 to 2 ms wide
> : > including
> : > : > the following 0.3 ms pulse, repeated every 20ms).
> : > : >
> : > : > Timer1 runs freely.  With a CCP1 interrupt (my only interrupt) I
> update
> : > : > CCPR1 with the duration until the next transition high or low and
> the
> : > : > CCP1CON bits to set the next transition in the correct direction.
> My
> : > main
> : > : > program clears a flag and that is all.
> : > : >
> : > : > Most of the time it works perfectly and looks like:
> : > : > http://www.cyberus.ca/~g_will/TxGlitch/NoGlitch1.jpg
> : > : >
> : > : > or detail
> : > : >
> : > : > http://www.cyberus.ca/~g_will/TxGlitch/NoGlitch.jpg
> : > : >
> : > : > The receiver pulses for the first 4 channes are shown in the logic
> : > section
> : > : > below.
> : > : >
> : > : > Every 20 to 100 frames on average (sometimes they are consectutive
> : > frames) I
> : > : > get a glitch:
> : > : >
> : > : > http://www.cyberus.ca/~g_will/TxGlitch/Glitch1.jpg
> : > : >
> : > : > or
> : > : >
> : > : > http://www.cyberus.ca/~g_will/TxGlitch/Glitch2.jpg
> : > : >
> : > : > The green lines indicate where the signal should have been.
> : > : >
> : > : > There is a fair bit of noise - about 1.8 volts p-p because the
> scope
> : > ground
> : > : > was attached to the battery neg lead.  I don't think that my
> probes
> are
> : > very
> : > : > well shielded either.  The noise is from the 72 Mhz RF.
> : > : >
> : > : > In each case the low output flips high.  My question is WHY?
> : > : >
> : > : > Timer 1 keeps on rolling as there is no problem with frame spacing
> or
> : > the
> : > : > width or placement of the next good pulse.
> : > : >
> : > : > CCPR1 is not upset or incorrectly set for the same reasons -
> because
> the
> : > : > next good pulse is in the proper location relative to the last
> good
> : > pulse.
> : > : >
> : > : > The serial and LCD have been comment out.  I'm reading 2 ADC on
> port
> A
> : > and
> : > : > 3ADC on port B.  All other pins on ports A,B,C are inputs and some
> are
> : > : > floating (could this be a problem?)
> : > : >
> : > : > Is there anything else on the chip that may be miss-configured
> that
> may
> : > be
> : > : > giving me a problem?
> : > : >
> : > : > The chip docs say:
> : > : > Note: Clearing the CCP1CON register will force
> : > : > the CCPx compare output latch to the
> : > : > default low level. This is not the PORT I/O
> : > : > data latch.
> : > : >
> : > : > But I don't think that this applies to me.  The only time that I
> do
> : > anything
> : > : > with the CCP1CON is during the long bit in the frame between the
> pulse
> : > : > series and the glitch doesn't always happen there.
> : > : >
> : > : > It is not read-mod-write ... I'm not writing anything to the port.
> : > : >
> : > : > I read the errata - nothing there indicated a problem.
> : > : >
> : > : > Any ideas what I should be looking at/ trying next??
> : > : >
> : > : > - I guess I should look at the 5 v power going to the chip to see
> that
> : > it is
> : > : > truly quiet and doesn't have a spike.  Brown out is disabled.
> : > : >
> : > : > - Should set the un-used outputs to either high or low.  - Good
> right?
> : > : >
> : > : > Funny that it is only affecting one pin that I can see.
> : > : >
> : > : > Looking for suggestions...
> : > : >
> : > : > Regards,
> : > : >
> : > : > Gordon Williams
> : > : >
> : > : > --
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[Gordon Williams]

Here are some readings across the battery just after the battery connector.
The battery is NiCad.  I've taken the spring hook clip off of the probe end.
The ground lead is about 20 cm long.  The scope that I am using is a
Bitscope.  The probe and scope front end are good to 100 MHz bandwidth.  The
sample rate is 25 Mhz.

If I attach the ground lead to the negative battery terminal but leave the
probe free I get 20 mV of noise.  If I touch the probe to the ground lead
connection I get 60 mV of noise (should be short circuit).  Leaving the gnd
lead attached and I put the probe on REF. I get 20 mV of noise.  Taking the
lead off and leaving it on ref there is < 5 mV of noise.  This is using the
1x probe and 130mv range.


Across the battery
For different settings I get different readings:

10x probe, AC
+/-Range             Noise Vp-p
1.3V  0.69
6.0   0.94
12.0  1.6

1x probe, AC
130 mV    0.06 noise
600 mV    0.08
1.2 V       0.13
3.16        0.15

As you can see, they aren't consistent.  Both 1x and 10x noise appears to
increase with range setting.  Both essentially double from the lowest to the
highest in the range. The noise on the 10x probe setting is 10 times the 1x
setting.

Which one should I believe?

Should I be using only the 1x probe setting?

  I assume that the amount of roll-off I have changes with the settings.
The noise is at 72 MHz so it is getting close to the 100 MHz.

I don't know what you mean when you say "When you are measuring noise, you
must move your ground probe terminal near the probe active ground terminal
as well."

The transmitter that I am modifying is a hitec laser 4.  Guessing that they
make 1000s per year.  PCB is single sided, no shielding, no separate
grounds, looks like there are at least 3 ground loops...

You can see pics and the schematic on the FCC site:
https://gullfoss2.fcc.gov/oetcf/eas/reports/ViewExhibitReport.cfm?mode=Exhibits&RequestTimeout=500&calledFromFrame=N&application_id=100973&fcc_id='IFHLAS46'

I'm replacing IC1 with a PIC on a daughter board and then making the
connections that I need at the location of IC1.

Interesting that you don't think that it is noise.  What else could it be?

Regards,

Gordon Williams

----- Original Message -----
From: "Vasile Surducan" <piclist9@...>
To: "Microcontroller discussion list - Public." <piclist@...>
Sent: Tuesday, May 13, 2008 12:31 AM
Subject: Re: [PIC] CCP1 Glitches in noisy environment (RC Tx)


: On 5/12/08, Gordon Williams <g_will@...> wrote:
: > Richard and David,
: >
: > The stack is OK.
: >
: > The noise appears to be coming in on the 5v supply and/or ground line(s)
: > from the main board.  There is no separate ground for the analog,
digital
: > and RF sections.  They are all lumped together.  The RF runs directly
off of
: > the battery voltage, 9.6 volts nom.  At the battery with the scope I
have
: > about 2 volts p-p of noise.
: >
: > I put a 1 ohm resistor in the supply line expecting that it would make
an RC
: > filter with the caps on the daughter board because the noise is 72 Mhz.
It
: > improved things slightly - maybe.
: >
: > After doing a bit of research, it looks like the 10uF Tant won't do much
for
: > noise at this frequency because of the ESR.  The three 0.1uF ceramics
should
: > do OK.
: >
: > I have some ferrite beads on hand that I would like to try out.  They
are
: > axial single beads BL01RN1
: > http://www.electrokit.se/download/0900766b80098a6d.pdf
: >
: > Putting o